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RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalabil

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Item specifics

Condition
Good: A book that has been read but is in good condition. Very minimal damage to the cover including ...
Subject
Design
ISBN
9780471720928

About this product

Product Identifiers

Publisher
Wiley & Sons, Incorporated, John
ISBN-10
0471720925
ISBN-13
9780471720928
eBay Product ID (ePID)
48639480

Product Key Features

Number of Pages
694 Pages
Language
English
Publication Name
Rtl Hardware Design Using Vhdl : Coding for Efficiency, Portability, and Scalability
Subject
Electronics / Circuits / Logic, Hardware / General
Publication Year
2006
Type
Textbook
Author
Pong P. Chu
Subject Area
Computers, Technology & Engineering
Series
IEEE Press Ser.
Format
Hardcover

Dimensions

Item Height
1.6 in
Item Weight
48.7 Oz
Item Length
10.3 in
Item Width
7.3 in

Additional Product Features

Intended Audience
Scholarly & Professional
LCCN
2005-054234
Dewey Edition
22
Illustrated
Yes
Dewey Decimal
621.392
Table Of Content
Preface. Acknowlegmentss. 1. Introduction to Digital System Design. 2. Overview on Hardware Description Language. 3. Basic Language Constructs of VHDL. 4. Concurrent Signal Assignment Statements of VHDL. 5. Sequential Statements of VHDL. 6. Synthesis of VHDL Code. 7. Combinational Circuit Design: Practice. 8. Sequential Circuit Design: Principle. 9. Sequential Circuit Design: Practice. 10. Finite State Machine: Princple and Practice. 11. Register Transfer Methodology: Principle. 12. Register Transfer Methodology: Practice. 13. Hierarchical Design in VHDL. 14. Parameterized Design: Principle. 15. Parameterized Design: Practice. 16. Clock and Synchronization: Principle and Practice. References. Index.
Synopsis
This text teaches readers how to systematically design efficient, portable "moderately complex" digital circuits using the VHDL hardware description language and synthesis software. The focus is on the module-level design, which is composed of functional units, routing circuit and storage., The skills and guidance needed to master RTL hardware design This book teaches readers how to systematically design efficient, portable, and scalable Register Transfer Level (RTL) digital circuits using the VHDL hardware description language and synthesis software. Focusing on the module-level design, which is composed of functional units, routing circuit, and storage, the book illustrates the relationship between the VHDL constructs and the underlying hardware components, and shows how to develop codes that faithfully reflect the module-level design and can be synthesized into efficient gate-level implementation. Several unique features distinguish the book: * Coding style that shows a clear relationship between VHDL constructs and hardware components * Conceptual diagrams that illustrate the realization of VHDL codes * Emphasis on the code reuse * Practical examples that demonstrate and reinforce design concepts, procedures, and techniques * Two chapters on realizing sequential algorithms in hardware * Two chapters on scalable and parameterized designs and coding * One chapter covering the synchronization and interface between multiple clock domains Although the focus of the book is RTL synthesis, it also examines the synthesis task from the perspective of the overall development process. Readers learn good design practices and guidelines to ensure that an RTL design can accommodate future simulation, verification, and testing needs, and can be easily incorporated into a larger system or reused. Discussion is independent of technology and can be applied to both ASIC and FPGA devices. With a balanced presentation of fundamentals and practical examples, this is an excellent textbook for upper-level undergraduate or graduate courses in advanced digital logic. Engineers who need to make effective use of today's synthesis software and FPGA devices should also refer to this book., The skills and guidance needed to master RTL hardware design This book teaches readers how to systematically design efficient, portable, and scalable Register Transfer Level (RTL) digital circuits using the VHDL hardware description language and synthesis software. Focusing on the module-level design, which is composed of functional units, routing circuit, and storage, the book illustrates the relationship between the VHDL constructs and the underlying hardware components, and shows how to develop codes that faithfully reflect the module-level design and can be synthesized into efficient gate-level implementation. Several unique features distinguish the book: Coding style that shows a clear relationship between VHDL constructs and hardware components Conceptual diagrams that illustrate the realization of VHDL codes Emphasis on the code reuse Practical examples that demonstrate and reinforce design concepts, procedures, and techniques Two chapters on realizing sequential algorithms in hardware Two chapters on scalable and parameterized designs and coding One chapter covering the synchronization and interface between multiple clock domains Although the focus of the book is RTL synthesis, it also examines the synthesis task from the perspective of the overall development process. Readers learn good design practices and guidelines to ensure that an RTL design can accommodate future simulation, verification, and testing needs, and can be easily incorporated into a larger system or reused. Discussion is independent of technology and can be applied to both ASIC and FPGA devices. With a balanced presentation of fundamentals and practical examples, this is an excellent textbook for upper-level undergraduate or graduate courses in advanced digital logic. Engineers who need to make effective use of todays synthesis software and FPGA devices should also refer to this book.
LC Classification Number
TK7868.D5C46 2006

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