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SystemVerilog for Verification: A Guide to Learning the Testbench La - VERY GOOD - Picture 1 of 1
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SystemVerilog for Verification: A Guide to Learning the Testbench La - VERY GOOD

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Very Good
Price:
US $57.56
ApproximatelyC $78.87
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Item specifics

Condition
Very Good: A book that does not look new and has been read but is in excellent condition. No obvious ...
Brand
Unbranded
Book Title
SystemVerilog for Verification: A Guide to Learning the Testbenc
MPN
Does not apply
ISBN
9781489995001
Subject Area
Computers, Technology & Engineering
Publication Name
Systemverilog for Verification : a Guide to Learning the Testbench Language Features
Publisher
Springer
Item Length
9.3 in
Subject
Cad-Cam, Hardware / General, Electronics / Circuits / Integrated, Electronics / Circuits / General, Programming / Object Oriented, Logic Design
Publication Year
2014
Type
Textbook
Format
Trade Paperback
Language
English
Author
Chris Spear, Greg Tumbush
Item Weight
27.2 Oz
Item Width
6.1 in
Number of Pages
Xliv, 464 Pages

About this product

Product Information

Verification Guidelines.- Data Types.- Procedural Statements and Routines.- Connecting the Testbench and Design.- Basic OOP.- Randomization.- Threads and Interprocess Communication.- Advanced OOP and Testbench Guidelines.- Functional Coverage.- Advanced Interfaces.- A Complete SystemVerilog Testbench.- Interfacing with C/C++.

Product Identifiers

Publisher
Springer
ISBN-10
1489995005
ISBN-13
9781489995001
eBay Product ID (ePID)
203443454

Product Key Features

Number of Pages
Xliv, 464 Pages
Language
English
Publication Name
Systemverilog for Verification : a Guide to Learning the Testbench Language Features
Publication Year
2014
Subject
Cad-Cam, Hardware / General, Electronics / Circuits / Integrated, Electronics / Circuits / General, Programming / Object Oriented, Logic Design
Type
Textbook
Subject Area
Computers, Technology & Engineering
Author
Chris Spear, Greg Tumbush
Format
Trade Paperback

Dimensions

Item Weight
27.2 Oz
Item Length
9.3 in
Item Width
6.1 in

Additional Product Features

Edition Number
3
Intended Audience
Scholarly & Professional
Dewey Edition
22
Number of Volumes
1 Vol.
Illustrated
Yes
Dewey Decimal
621.39/2
Lc Classification Number
Tk7867-7867.5
Table of Content
Verification Guidelines.- Data Types.- Procedural Statements and Routines.- Connecting the Testbench and Design.- Basic OOP.- Randomization.- Threads and Interprocess Communication.- Advanced OOP and Testbench Guidelines.- Functional Coverage.- Advanced Interfaces.- A Complete SystemVerilog Testbench.- Interfacing with C/C++.
Copyright Date
2012

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